Nonvolatile memory devices are used for a variety of applications. Such conventional semiconductor devices typically include a core and a periphery. The core typically has a number of memory devices, each of which includes a conventional core gate stack, a source at one end of the gate stack and a drain at the opposing end of the gate stack. Each conventional core gate stack includes a polysilicon gate, a WSi layer, a polysilicon capping layer and an SiN or SiON layer. The devices also include spacers at the ends of the conventional gate stacks. The periphery also includes a plurality of conventional devices. Each of the conventional devices at the periphery includes a conventional polysilicon gate and a WSi layer on the polysilicon gate. Between the conventional gates are source and drain regions at opposing edge of the gate. The source and drains are provided with WSi regions for connecting to the source and drain. In addition, conventional devices at the periphery include spacers at the ends of the gates.
In order for the conventional semiconductor device to function, electrical contact is made to the conventional gate stacks at the core and the conventional devices at the periphery. Typically, electrical contact is made to the conventional gate stacks at the core using the WSi layer. Similarly, electrical contact is made to the conventional gates at the periphery using the WSi layer. Electrical contact to the sources and drains is also provided through a WSi layer. As a result, electrical signals can be provided to the devices at the core and periphery of the conventional semiconductor device.
Although the conventional device functions, one of ordinary skill in the art will readily recognize that the conventional device has drawbacks. In particular, the WSi used to make electrical contact to the conventional gate at the periphery has a relatively high sheet resistance. As a result, the performance of the conventional semiconductor device suffers.
Accordingly, what is needed is a system and method for providing a semiconductor device having a lower sheet resistance, The present invention addresses such a need.